When a central processing unit (CPU) has a cache to which access is made faster than access made to a memory, data is stored to the cache when a CPU makes a data writing request. The CPU, therefore, can read the data out of the cache, thus achieve faster data reading.
In a multi-core processor system, the assignment of threads to CPUs is assigned is determined according to the assignment state of threads. If a given program includes data to be shared between multiple threads, the data may potentially be used by multiple CPUs. In the assignment of a thread in the multi-core processor, the thread is assigned to, for example, a CPU with the least load.
According to a known technique, when each CPU has a distributed cache in a multi-core processor system, data is stored in the distributed cache of each CPU when a data writing request is issued (first conventional technique). To maintain the consistency of data between distributed caches, a snoop process is executed. In the snoop process, when a change in a cache line is detected at the distributed cache of one CPU, the distributed cache of a different CPU is updated via a snoop bus.
Another technique is known in which data is saved to any one among distributed caches of a multi-core processor, and a CPU not storing data in the distributed cache thereof accesses the distributed cache of the CPU storing the data and reads out the data (second conventional technique) (see, e.g., Japanese Laid-Open Patent Publication No. H1-251250).
Still another technique is known where in a multi-core processor system, each CPU has a local memory and one CPU writes data to the local memory of a different CPU (see, e.g., Japanese Laid-Open Patent Publication No. H11-39214).
According to the second conventional technique, however, a CPU not storing data in its distributed cache must access a CPU storing the data in its distribute cache in order to read the data. Hence, the CPUs differ in the speed of access to the data. In other words, the second conventional technique poses a problem in that a CPU not storing data in its distributed cache has a lower data reading speed.
According to the first conventional technique, because data is stored in the distributed cache of each CPU, lower data reading speed, which is the case of the second conventional technique, does not result. It cannot be presupposed, however, that every CPU of the multi-core processor reads out data from the respective distributed cache thereof. The area of the distributed cache of the CPU may be occupied with unread data, which is a problem.